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external-bluetooth-sbc: Commit

external/bluetooth/sbc


Commit MetaInfo

Révision27fab34fb2d1dc97fcce849de709cd17638826d8 (tree)
l'heure2014-01-23 08:07:42
AuteurMarcel Holtmann <marcel@holt...>
CommiterMarcel Holtmann

Message de Log

TODO: Update entries in TODO list

Change Summary

Modification

--- a/TODO
+++ b/TODO
@@ -14,36 +14,41 @@ Background
1414 Higher complexity tasks should be refined into several lower complexity tasks
1515 once the task is better understood.
1616
17-NEON instruction set
18-====================
17+Encoder optimizations
18+=====================
1919
20-- The neon optimization code is split in two parts. Sample reordering and blocks
21-encoding. There is a neon optimization for encoding SBC. But mSBC is not
22-supported by this optimizer because the reordering has been specifically for
23-mSBC.
20+- Currently, only the decoder is optimized to take advantage of advanced
21+ processor instruction sets. In use cases like HFP 1.6, optimizing the
22+ encoder will bring a significant latency, power and performance advantage.
23+ For example, the MMX encoder is 3 to 6 time faster than the SIMD encoder.
24+
25+ Priority: High
26+ Complexity: C8
27+
28+- Use a log2 table for byte integer scale factors calculation (sum log2
29+ results for high and low bytes) fill bitpool by 16 bits instead of one
30+ at a time in bits allocation/bitpool generation port to the dsp
31+
32+ Priority: Medium
33+ Complexity: C2
34+
35+- The neon optimization code is split in two parts. Sample reordering and
36+ blocks encoding. There is a neon optimization for encoding SBC. But mSBC
37+ is not supported by this optimizer because the reordering has been
38+ specifically for mSBC.
2439
2540 Priority: Low
2641 Complexity: C2
2742
28-SSE instruction set
29-===================
43+Decoder optimizations
44+=====================
3045
31-- The decoder is optimized to take advantage of advanced processor instruction
32-sets. Currently implemented are MMX, arm neon, arm v6 and iwmmxt. SSE3 is
33-is available since almost 10 years now, on a large range of Intel processors.
34-It should be interesting to implement it and to compare with MMX implementation
35-on Intel processors.
46+- The decoder is optimized to take advantage of advanced processor
47+ instruction sets. Currently implemented are MMX, arm neon, arm v6
48+ and iwmmxt. SSE3 is available since almost 10 years now, on a large
49+ range of Intel processors. It should be interesting to implement it
50+ and to compare with MMX implementation on Intel processors.
3651
3752 Priority: Medium
3853 Complexity: C4
3954
40-Decoder improvements
41-====================
42-
43-- Currently, only the decoder is optimized to take advantage of advanced
44-processor instruction sets. In use cases like HFP 1.6, optimizing the encoder
45-will bring a significant latency, power and performance advantage. For exemple,
46-the MMX encoder is 3 to 6 time faster than the SIMD encoder.
47-
48- Priority: High
49- Complexity: C8
--- a/sbc/sbc.c
+++ b/sbc/sbc.c
@@ -25,14 +25,6 @@
2525 *
2626 */
2727
28-/* todo items:
29-
30- use a log2 table for byte integer scale factors calculation (sum log2 results
31- for high and low bytes) fill bitpool by 16 bits instead of one at a time in
32- bits allocation/bitpool generation port to the dsp
33-
34-*/
35-
3628 #ifdef HAVE_CONFIG_H
3729 #include <config.h>
3830 #endif
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