Kazu Hirata
kazu****@cs*****
2004年 2月 2日 (月) 09:56:52 JST
Fork佐藤様、
bit 操作系の命令の二番目の operand が @erX 以外のものになってしまうと
H8/300H で受付けられない命令になってしまう可能性があるため、"+m" でな
く、"r" と @ の組み合わせを使う必要があります。
よろしくご検討下さい。
Kazu Hirata
Index: bitops.h
===================================================================
RCS file: /cvsroot/uclinux-h8/uClinux-2.4.x/include/asm-h8300/bitops.h,v
retrieving revision 1.21
diff -b -u -r1.21 bitops.h
--- bitops.h 27 Jan 2004 15:43:25 -0000 1.21
+++ bitops.h 2 Feb 2004 00:52:55 -0000
@@ -44,36 +44,34 @@
switch(nr) \
{ \
case 0: \
- __asm__(OP " #0,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
case 1: \
- __asm__(OP " #1,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
case 2: \
- __asm__(OP " #2,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
case 3: \
- __asm__(OP " #3,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
case 4: \
- __asm__(OP " #4,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
case 5: \
- __asm__(OP " #5,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
case 6: \
- __asm__(OP " #6,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
case 7: \
- __asm__(OP " #7,%0" :"+m"(*b_addr) :"m"(*b_addr)); \
+ __asm__(OP " #0,@%0" : :"r"(b_addr) : "memory"); \
break; \
} \
} \
else \
{ \
- __asm__(OP " %w1,%0" \
- :"+m"(*b_addr) \
- :"r"(nr),"m"(*b_addr)); \
+ __asm__(OP " %w0,@%1" : :"r"(nr),"r"(b_addr) : "memory"); \
} \
}
@@ -116,22 +114,22 @@
#define __test_bit(nr, addr) test_bit((nr), (addr))
#define H8300_GEN_TEST_BITOP_IMM_INT(OP,BIT) \
- __asm__("stc ccr,%w2\n\t" \
+ __asm__("stc ccr,%w1\n\t" \
"orc #0x80,ccr\n\t" \
- "bld #" BIT ",%1\n\t" \
- OP " #" BIT ",%1\n\t" \
+ "bld #" BIT ",@%3\n\t" \
+ OP " #" BIT ",@%3\n\t" \
"rotxl.l %0\n\t" \
- "ldc %w2,ccr" \
- : "=r"(retval),"+m"(*a),"+r"(ccrsave) \
- : "0" (retval),"1" (*a) \
+ "ldc %w1,ccr" \
+ : "=r"(retval),"+r"(ccrsave) \
+ : "0" (retval),"r" (a) \
: "memory");
#define H8300_GEN_TEST_BITOP_IMM(OP,BIT) \
- __asm__("bld #" BIT ",%1\n\t" \
- OP " #" BIT ",%1\n\t" \
+ __asm__("bld #" BIT ",@%2\n\t" \
+ OP " #" BIT ",@%2\n\t" \
"rotxl.l %0\n\t" \
- : "=r"(retval),"+m"(*a) \
- : "0" (retval),"1" (*a) \
+ : "=r"(retval) \
+ : "0" (retval),"r" (a) \
: "memory");
#define H8300_GEN_TEST_BITOP_INT(FNNAME,OP) \
@@ -143,16 +141,16 @@
\
a = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
if(__builtin_constant_p(nr) == 0) { \
- __asm__("stc ccr,%w2\n\t" \
+ __asm__("stc ccr,%w1\n\t" \
"orc #0x80,ccr\n\t" \
- "btst %w5,%1\n\t" \
- OP " %w5,%1\n\t" \
+ "btst %w4,@%3\n\t" \
+ OP " %w4,@%3\n\t" \
"beq 1f\n\t" \
"inc.l #1,%0\n" \
"1:\n\t" \
- "ldc %w2,ccr" \
- : "=r"(retval),"+m"(*a),"+r"(ccrsave) \
- : "0" (retval),"1" (*a),"r"(nr & 7) \
+ "ldc %w1,ccr" \
+ : "=r"(retval),"+r"(ccrsave) \
+ : "0" (retval),"r" (a),"r"(nr & 7) \
: "memory"); \
return retval; \
} else { \
@@ -194,13 +192,13 @@
\
a = (volatile unsigned char *)addr + ((nr >> 3) ^ 3); \
if(__builtin_constant_p(nr) == 0) { \
- __asm__("btst %w4,%1\n\t" \
- OP " %w4,%1\n\t" \
+ __asm__("btst %w3,@%2\n\t" \
+ OP " %w3,@%2\n\t" \
"beq 1f\n\t" \
"inc.l #1,%0\n" \
"1:\n\t" \
- : "=r"(retval),"+m"(*a) \
- : "0" (retval),"1" (*a),"r"(nr & 7) \
+ : "=r"(retval) \
+ : "0" (retval),"r" (a),"r"(nr & 7) \
: "memory"); \
return retval; \
} else { \