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GNU Binutils with patches for OS216


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Révisiona9f02af88d230aabf6771f94a6c401727a865188 (tree)
l'heure2016-03-11 01:06:35
AuteurMickael Guene <mickael.guene@st.c...>
CommiterChristophe Lyon

Message de Log

PR gas/19744: Thumb-1 pcrop relocations don't work on Thumb-2 targets

gas/
* config/tc-arm.c (do_arit): Protect against bad relocations usage.
(do_mov): Likewise.
(do_t_add_sub): Allow pcrop relocations for Thumb-2 targets.
(do_t_mov_cmp): Likewise.
(do_t_add_sub): Protect against bad relocations usage.
(do_t_mov_cmp): Likewise.

gas/testsuite/
* gas/arm/adds-thumb1-reloc-local-armv7-m.s: New.
* gas/arm/adds-thumb1-reloc-local-armv7-m.d: New.
* gas/arm/movs-thumb1-reloc-local-armv7-m.s: New.
* gas/arm/movs-thumb1-reloc-local-armv7-m.d: New.

ld/
* testsuite/ld-arm/arm-elf.exp: New tests.
* testsuite/ld-arm/thumb1-adds-armv7-m.s: New.
* testsuite/ld-arm/thumb1-movs-armv7-m.s: New.

Change Summary

Modification

--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,13 @@
1+2016-03-10 Mickael Guene <mickael.guene@st.com>
2+
3+ PR gas/19744
4+ * config/tc-arm.c (do_arit): Protect against bad relocations usage.
5+ (do_mov): Likewise.
6+ (do_t_add_sub): Allow pcrop relocations for Thumb-2 targets.
7+ (do_t_mov_cmp): Likewise.
8+ (do_t_add_sub): Protect against bad relocations usage.
9+ (do_t_mov_cmp): Likewise.
10+
111 2016-03-09 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
212
313 * config/tc-arm.c (neon_alignment_bit): Rename do_align to
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -787,6 +787,7 @@ struct asm_opcode
787787 #define BAD_RANGE _("branch out of range")
788788 #define BAD_FP16 _("selected processor does not support fp16 instruction")
789789 #define UNPRED_REG(R) _("using " R " results in unpredictable behaviour")
790+#define THUMB1_RELOC_ONLY _("relocation valid in thumb1 code only")
790791
791792 static struct hash_control * arm_ops_hsh;
792793 static struct hash_control * arm_cond_hsh;
@@ -8315,6 +8316,9 @@ do_adrl (void)
83158316 static void
83168317 do_arit (void)
83178318 {
8319+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
8320+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
8321+ THUMB1_RELOC_ONLY);
83188322 if (!inst.operands[1].present)
83198323 inst.operands[1].reg = inst.operands[0].reg;
83208324 inst.instruction |= inst.operands[0].reg << 12;
@@ -8972,6 +8976,9 @@ do_mlas (void)
89728976 static void
89738977 do_mov (void)
89748978 {
8979+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
8980+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
8981+ THUMB1_RELOC_ONLY);
89758982 inst.instruction |= inst.operands[0].reg << 12;
89768983 encode_arm_shifter_operand (1);
89778984 }
@@ -10472,9 +10479,12 @@ do_t_add_sub (void)
1047210479 inst.instruction |= (Rd << 4) | Rs;
1047310480 if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
1047410481 || inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
10475- inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
10476- if (inst.size_req != 2)
10477- inst.relax = opcode;
10482+ {
10483+ if (inst.size_req == 2)
10484+ inst.reloc.type = BFD_RELOC_ARM_THUMB_ADD;
10485+ else
10486+ inst.relax = opcode;
10487+ }
1047810488 }
1047910489 else
1048010490 constraint (inst.size_req == 2, BAD_HIREG);
@@ -10482,6 +10492,9 @@ do_t_add_sub (void)
1048210492 if (inst.size_req == 4
1048310493 || (inst.size_req != 2 && !opcode))
1048410494 {
10495+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
10496+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
10497+ THUMB1_RELOC_ONLY);
1048510498 if (Rd == REG_PC)
1048610499 {
1048710500 constraint (add, BAD_PC);
@@ -11826,17 +11839,21 @@ do_t_mov_cmp (void)
1182611839 {
1182711840 inst.instruction = THUMB_OP16 (opcode);
1182811841 inst.instruction |= Rn << 8;
11829- if (inst.size_req == 2)
11842+ if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
11843+ || inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
1183011844 {
11831- if (inst.reloc.type < BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
11832- || inst.reloc.type > BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC)
11845+ if (inst.size_req == 2)
1183311846 inst.reloc.type = BFD_RELOC_ARM_THUMB_IMM;
11847+ else
11848+ inst.relax = opcode;
1183411849 }
11835- else
11836- inst.relax = opcode;
1183711850 }
1183811851 else
1183911852 {
11853+ constraint (inst.reloc.type >= BFD_RELOC_ARM_THUMB_ALU_ABS_G0_NC
11854+ && inst.reloc.type <= BFD_RELOC_ARM_THUMB_ALU_ABS_G3_NC ,
11855+ THUMB1_RELOC_ONLY);
11856+
1184011857 inst.instruction = THUMB_OP32 (inst.instruction);
1184111858 inst.instruction = (inst.instruction & 0xe1ffffff) | 0x10000000;
1184211859 inst.instruction |= Rn << r0off;
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
1+2016-03-10 Mickael Guene <mickael.guene@st.com>
2+
3+ PR gas/19744
4+ * gas/arm/adds-thumb1-reloc-local-armv7-m.s: New.
5+ * gas/arm/adds-thumb1-reloc-local-armv7-m.d: New.
6+ * gas/arm/movs-thumb1-reloc-local-armv7-m.s: New.
7+ * gas/arm/movs-thumb1-reloc-local-armv7-m.d: New.
8+
19 2016-02-16 Claudiu Zissulescu <claziss@synopsys.com>
210
311 * gas/cfi/cfi-arc-1.d: New file.
--- /dev/null
+++ b/gas/testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.d
@@ -0,0 +1,16 @@
1+#objdump: -dr --prefix-addresses --show-raw-insn
2+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
3+#name: ADDS relocations against local symbols for armv7-m
4+
5+.*: +file format .*arm.*
6+
7+Disassembly of section .text:
8+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
9+ 0: R_ARM_THM_ALU_ABS_G3_NC bar
10+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
11+ 2: R_ARM_THM_ALU_ABS_G2_NC bar
12+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
13+ 4: R_ARM_THM_ALU_ABS_G1_NC bar
14+0[0-9a-f]+ <[^>]+> 3000 adds r0, #0
15+ 6: R_ARM_THM_ALU_ABS_G0_NC bar
16+#...
--- /dev/null
+++ b/gas/testsuite/gas/arm/adds-thumb1-reloc-local-armv7-m.s
@@ -0,0 +1,13 @@
1+.arch armv7-m
2+.text
3+.syntax unified
4+.thumb
5+foo:
6+adds r0, #:upper8_15:#bar
7+adds r0, #:upper0_7:#bar
8+adds r0, #:lower8_15:#bar
9+adds r0, #:lower0_7:#bar
10+
11+.space 0x10000
12+
13+bar:
--- /dev/null
+++ b/gas/testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.d
@@ -0,0 +1,16 @@
1+#objdump: -dr --prefix-addresses --show-raw-insn
2+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
3+#name: MOVS relocations against local symbols for armv7-m
4+
5+.*: +file format .*arm.*
6+
7+Disassembly of section .text:
8+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
9+ 0: R_ARM_THM_ALU_ABS_G3_NC bar
10+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
11+ 2: R_ARM_THM_ALU_ABS_G2_NC bar
12+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
13+ 4: R_ARM_THM_ALU_ABS_G1_NC bar
14+0[0-9a-f]+ <[^>]+> 2000 movs r0, #0
15+ 6: R_ARM_THM_ALU_ABS_G0_NC bar
16+#...
--- /dev/null
+++ b/gas/testsuite/gas/arm/movs-thumb1-reloc-local-armv7-m.s
@@ -0,0 +1,13 @@
1+.arch armv7-m
2+.text
3+.syntax unified
4+.thumb
5+foo:
6+movs r0, #:upper8_15:#bar
7+movs r0, #:upper0_7:#bar
8+movs r0, #:lower8_15:#bar
9+movs r0, #:lower0_7:#bar
10+
11+.space 0x10000
12+
13+bar:
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,10 @@
1+2016-03-10 Mickael Guene <mickael.guene@st.com>
2+
3+ PR gas/19744
4+ * testsuite/ld-arm/arm-elf.exp: New tests.
5+ * testsuite/ld-arm/thumb1-adds-armv7-m.s: New.
6+ * testsuite/ld-arm/thumb1-movs-armv7-m.s: New.
7+
18 2016-03-10 Nick Clifton <nickc@redhat.com>
29
310 * scripttempl/elf32msp430.sc (.rodata): Remove spurious LONG(0).
--- a/ld/testsuite/ld-arm/arm-elf.exp
+++ b/ld/testsuite/ld-arm/arm-elf.exp
@@ -235,6 +235,12 @@ set armelftests_common_3 {
235235 {"ADDS thumb1 relocations" "-static -T arm.ld" "" "" {thumb1-adds.s}
236236 {{objdump -dw thumb1-adds.d}}
237237 "thumb1-adds"}
238+ {"MOVS thumb1 relocations for armv7-m target" "-static -T arm.ld" "" "" {thumb1-movs-armv7-m.s}
239+ {{objdump -dw thumb1-movs.d}}
240+ "thumb1-movs"}
241+ {"ADDS thumb1 relocations for armv7-m target" "-static -T arm.ld" "" "" {thumb1-adds-armv7-m.s}
242+ {{objdump -dw thumb1-adds.d}}
243+ "thumb1-adds"}
238244 }
239245
240246 run_ld_link_tests $armelftests_common_1
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb1-adds-armv7-m.s
@@ -0,0 +1,43 @@
1+ .text
2+ .arch armv7-m
3+ .syntax unified
4+ .global _start
5+ .thumb_func
6+ .type _start, %function
7+_start:
8+ .thumb_func
9+ .type thumb1, %function
10+thumb1:
11+ adds r0, #:upper8_15:#thumb3
12+ adds r1, #:upper0_7:#thumb3
13+ adds r2, #:lower8_15:#thumb1
14+ adds r3, #:lower0_7:#thumb1
15+ adds r4, #:lower0_7:#thumb3
16+ adds r5, #:lower8_15:#thumb3
17+ adds r6, #:upper0_7:#thumb1
18+ adds r7, #:upper8_15:#thumb1
19+ .thumb_func
20+ .type thumb2, %function
21+thumb2:
22+ adds r0, #:upper8_15:#thumb3
23+ adds r1, #:upper0_7:#(var2 + 1)
24+ adds r2, #:lower8_15:#(thumb3 + 255)
25+ adds r3, #:lower0_7:#(var1 + 0xaa)
26+ adds r7, #:upper8_15:#var1 + 4
27+ adds r6, #:upper0_7:#thumb3
28+ adds r5, #:lower8_15:#var2 + 0xff
29+ adds r4, #:lower0_7:#var2 - (-2)
30+var1:
31+ .byte 1
32+var2:
33+ .byte 2
34+
35+ .section .far, "ax", %progbits
36+ .thumb_func
37+ .type thumb3, %function
38+thumb3:
39+ adds r0, #:upper8_15:#thumb1
40+ adds r1, #:upper0_7:#thumb2
41+ adds r2, #:lower8_15:#thumb3
42+ adds r3, #:lower0_7:#thumb1
43+
--- /dev/null
+++ b/ld/testsuite/ld-arm/thumb1-movs-armv7-m.s
@@ -0,0 +1,43 @@
1+ .text
2+ .arch armv7-m
3+ .syntax unified
4+ .global _start
5+ .thumb_func
6+ .type _start, %function
7+_start:
8+ .thumb_func
9+ .type thumb1, %function
10+thumb1:
11+ movs r0, #:upper8_15:#thumb3
12+ movs r1, #:upper0_7:#thumb3
13+ movs r2, #:lower8_15:#thumb1
14+ movs r3, #:lower0_7:#thumb1
15+ movs r4, #:lower0_7:#thumb3
16+ movs r5, #:lower8_15:#thumb3
17+ movs r6, #:upper0_7:#thumb1
18+ movs r7, #:upper8_15:#thumb1
19+ .thumb_func
20+ .type thumb2, %function
21+thumb2:
22+ movs r0, #:upper8_15:#(thumb3 + 0)
23+ movs r1, #:upper0_7:#(thumb2 + 1)
24+ movs r2, #:lower8_15:#(var1 + 255)
25+ movs r3, #:lower0_7:#var1
26+ movs r7, #:upper8_15:#var1 + 4
27+ movs r6, #:upper0_7:#var2
28+ movs r5, #:lower8_15:#var2 + 0xff
29+ movs r4, #:lower0_7:#var2 - (-1)
30+var1:
31+ .byte 1
32+var2:
33+ .byte 2
34+
35+ .section .far, "ax", %progbits
36+ .thumb_func
37+ .type thumb3, %function
38+thumb3:
39+ movs r0, #:upper8_15:#thumb1
40+ movs r1, #:upper0_7:#thumb2
41+ movs r2, #:lower8_15:#thumb3
42+ movs r3, #:lower0_7:#thumb1
43+