Commit: 4e9090810a8b6f08dc600d31149aa3c4bb95fb1e - shared_foo_backup (git)

shared_fooの不要ディレクトリ削除前のもの

Commit MetaInfo

• Révision: 4e9090810a8b6f08dc600d31149aa3c4bb95fb1e (tree)
• l'heure: 2018-03-11 16:51:09
• Auteur: takemasa <suikan@user...>
• Commiter: takemasa

Message de Log

Cache coherency funciton is now architecture dependent.

Change Summary

• modified: stm32_development/murasaki/murasaki/murasaki_defs.hpp

Modification

--- a/stm32_development/murasaki/murasaki/murasaki_defs.hpp
+++ b/stm32_development/murasaki/murasaki/murasaki_defs.hpp
@@ -103,9 +103,21 @@ static inline bool IsTaskContext()
 
 }
 
-
+/**
+ * @brief Clean and Flush the specific region of data cache.
+ * @param address Start address of region
+ * @param size Size of region
+ * @details
+ * Keep coherency between the L2 memory and d-cache, between specific region.
+ *
+ * The region is specified by address and size. If address si not 32byte aligned,
+ * it is truncated to the 32byte alighment, and size is adjusted to follow this alighment.
+ *
+ * Once this funciton is returned, the specific region is coherent.
+ */
 static inline void InvalidateDataCacheByAddress(void * address, size_t size)
 {
+#ifdef __CORE_CM7_H_GENERIC
     unsigned int aligned_address = reinterpret_cast<unsigned int>(address);
 
     // extract modulo 32. The address have to be aligned to 32byte.
@@ -115,6 +127,11 @@ static inline void InvalidateDataCacheByAddress(void * address, size_t size)
     size += adjustment;             // Because the start address is lower, the size is bigger.
 
     ::SCB_InvalidateDCache_by_Addr(reinterpret_cast<long unsigned int *>(aligned_address), size);
+#elif defined ( __CORE_CM0_H_GENERIC ) ||defined ( __CORE_CM0PLUS_H_GENERIC ) ||defined ( __CORE_CM3_H_GENERIC ) ||defined ( __CORE_CM4_H_GENERIC ) ||
+    // Do nothing. These core doesn't have d-cache.
+#else
+#error "Unknown core"
+#endif
 }
 
 /**