Révision | 2b650fbbcc2b5d34943bb5697d8799b2c1a885e1 (tree) |
---|---|
l'heure | 2022-01-21 14:52:56 |
Auteur | Yifei Jiang <jiangyifei@huaw...> |
Commiter | Alistair Francis |
target/riscv: Support setting external interrupt by KVM
When KVM is enabled, set the S-mode external interrupt through
kvm_riscv_set_irq function.
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Mingwang Li <limingwang@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Message-id: 20220112081329.1835-8-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
@@ -630,7 +630,11 @@ static void riscv_cpu_set_irq(void *opaque, int irq, int level) | ||
630 | 630 | case IRQ_S_EXT: |
631 | 631 | case IRQ_VS_EXT: |
632 | 632 | case IRQ_M_EXT: |
633 | - riscv_cpu_update_mip(cpu, 1 << irq, BOOL_TO_MASK(level)); | |
633 | + if (kvm_enabled()) { | |
634 | + kvm_riscv_set_irq(cpu, irq, level); | |
635 | + } else { | |
636 | + riscv_cpu_update_mip(cpu, 1 << irq, BOOL_TO_MASK(level)); | |
637 | + } | |
634 | 638 | break; |
635 | 639 | default: |
636 | 640 | g_assert_not_reached(); |
@@ -23,3 +23,8 @@ void kvm_riscv_reset_vcpu(RISCVCPU *cpu) | ||
23 | 23 | { |
24 | 24 | abort(); |
25 | 25 | } |
26 | + | |
27 | +void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level) | |
28 | +{ | |
29 | + abort(); | |
30 | +} |
@@ -385,6 +385,23 @@ void kvm_riscv_reset_vcpu(RISCVCPU *cpu) | ||
385 | 385 | env->satp = 0; |
386 | 386 | } |
387 | 387 | |
388 | +void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level) | |
389 | +{ | |
390 | + int ret; | |
391 | + unsigned virq = level ? KVM_INTERRUPT_SET : KVM_INTERRUPT_UNSET; | |
392 | + | |
393 | + if (irq != IRQ_S_EXT) { | |
394 | + perror("kvm riscv set irq != IRQ_S_EXT\n"); | |
395 | + abort(); | |
396 | + } | |
397 | + | |
398 | + ret = kvm_vcpu_ioctl(CPU(cpu), KVM_INTERRUPT, &virq); | |
399 | + if (ret < 0) { | |
400 | + perror("Set irq failed"); | |
401 | + abort(); | |
402 | + } | |
403 | +} | |
404 | + | |
388 | 405 | bool kvm_arch_cpu_check_are_resettable(void) |
389 | 406 | { |
390 | 407 | return true; |
@@ -20,5 +20,6 @@ | ||
20 | 20 | #define QEMU_KVM_RISCV_H |
21 | 21 | |
22 | 22 | void kvm_riscv_reset_vcpu(RISCVCPU *cpu); |
23 | +void kvm_riscv_set_irq(RISCVCPU *cpu, int irq, int level); | |
23 | 24 | |
24 | 25 | #endif |